Microchip Technology /ATSAML11D14A /SCB /SCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (VALUE_0)SLEEPONEXIT 0 (VALUE_0)SLEEPDEEP 0 (SLEEPDEEPS)SLEEPDEEPS 0 (VALUE_0)SEVONPEND

SEVONPEND=VALUE_0, SLEEPDEEP=VALUE_0, SLEEPONEXIT=VALUE_0

Description

System Control Register

Fields

SLEEPONEXIT

Sleep on exit

0 (VALUE_0): O not sleep when returning to Thread mode

1 (VALUE_1): Enter sleep, or deep sleep, on return from an ISR

SLEEPDEEP

Sleep deep

0 (VALUE_0): Sleep

1 (VALUE_1): Deep sleep

SLEEPDEEPS

Sleep deep secure

SEVONPEND

Send Event on Pending bit

0 (VALUE_0): Only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded

1 (VALUE_1): Enabled events and all interrupts, including disabled interrupts, can wakeup the processor

Links

()